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AFE822x Design – Low Cost Dual Channel SDR

afe822x design

AFE822x design rocks. Its modern architecture includes a really neat Texas Instruments direct sampler, and an embedded ARM CPU for control and connectivity over USB or Ethernet. 

But let’s start with the specifications. Unfortunately, this requires a bit of guesswork as no one has done an independent laboratory review of the AFE822x design and implementation. According to the web site, Minimum Discernible Signal (MDS) is -136 dB and noise figure is 11 dB. That’s it.

So what have I found in my listening set-up?

Sensitivity is fine. The Afedri is as sensitive as any of my other SDR, including the Flex 6300, at least up to 20 MHz. For most of us, sensitivity is limited by local RFI much more than the radio.

Dynamic Range seems surprisingly good for a 12-bit Analog to Digital converter with only a 30 MHz low-pass filter. Essentially the ADC is connected to the antenna. Specs for the ADC are over 90 dB DR, with Spurious Free Dynamic Range of 96 dBc. If I take care to adjust the two gain/attenuation blocks in this receiver, I can avoid overload and spurious signals. The direct sampler also provides a lot of filtering and decimation to improve SNR.

Based on listening comparisons, I believe the Afedri SDR-Net outperforms the RSP2 on HF and, at least for my modest RF environment in western Canada, is on par with Perseus. For casual listening with some SDR programs, I can’t tell a lot of difference between the Flex 6300 and Afedri. That says a lot.

Ultimate selectivity of course depends as much on the SDR software as the Afedri hardware. Alex’s AFE822x design provides 16 bit I/Q data streams to the software. Available data rates support 230 kHz sampling bandwidth over USB and 1600 kHz with Ethernet.

AFE822x Design – About the Chips

The essence of the AFE822x design comes in three chips: VGA, Direct Sampler and CPU.

The Analog Devices AD8369 VGA’s provide a front end gain/attenuation range of 45 dB with an IP3 of nearly 20 dB, and a 7 dB noise figure. These broadband amplifiers are digitally controlled by the CPU in 3 dB steps.

But the really neat chip is the Texas Instruments AFE8220 Dual Channel Direct Sampler. Originally, TI developed this as an IF chip for AM, FM and HD radio. But since sampling runs at close to 80 MHz, Alex re-purposed the device for direct sampling up to 30 MHz. Using pipeline 12 bit ADC architecture, the chip contains dual channel programmable gain amplifiers, numerically controlled oscillators and a ton of filtering and decimation. Normally, you would find these in an FPGA.

Finally, an ARM Cortex-M3 microcontroller is used for radio control and to transfer the I/Q data over USB or Ethernet. Further filtering and demodulation must be done on the PC.

Afedri’s AFE822x design is a good example of modern SDR architecture. Coming up next, ordering and un-boxing.

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